Area-Power Efficient Generic Modulo Adder

Abstract

Modular adder is a crucial component which is typically employed in Forward, Reverse and channels in a Residue Number System. In This Paper we proposed a Novel generic modulo adder architecture which is based on Look ahead Carry logic by which hardware sharing is exploited and eliminated the re-computation of carry in the final stage. VLSI Implementation results using 180 nm standard cell Technology shows that the hardware requirement and power dissipation in proposed architecture is superior to other reported architectures.

Authors and Affiliations

I. B. K. Raju, P. Rajesh Kumar, S. Ramani Yadav

Keywords

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  • EP ID EP121737
  • DOI -
  • Views 115
  • Downloads 0

How To Cite

I. B. K. Raju, P. Rajesh Kumar, S. Ramani Yadav (2014). Area-Power Efficient Generic Modulo Adder. International Journal of Computational Engineering and Management IJCEM, 17(6), 1-7. https://www.europub.co.uk/articles/-A-121737