Implementation of High Performance Comparator in 90nm Technology

Abstract

 In this paper a CMOS Differential current sensing comparator along with the Buffer stage has been introduced. In this paper comparator is implemented in a standard TSMC 90nm CMOS technology using Mentor Graphics Tool The simulation is carried out in 90nm technology. The supply voltage for this comparator is ± 0.9v. This paper firstly elaborate about basic introduction of Comparator. Next section elaborate Different Current Sensing Comparator and Buffer Stage. Next section elaborate the design of comparator . Last section consist simulation results.

Authors and Affiliations

Unnati Patel*1

Keywords

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  • EP ID EP95430
  • DOI -
  • Views 74
  • Downloads 0

How To Cite

Unnati Patel*1 (30).  Implementation of High Performance Comparator in 90nm Technology. International Journal of Engineering Sciences & Research Technology, 3(3), 1378-1381. https://www.europub.co.uk/articles/-A-95430